Interrupts:
•
An
interrupt is an external or
internal event that interrupts the microcontroller to inform it that a device
needs its service.
Interrupts vs. Polling
•
A
single microcontroller can serve several devices.
•
There are two ways to do that:
–
interrupts
–
Polling.
•
The
program which is associated with the interrupt is called the interrupt service
routine (ISR) or interrupt handler.
Steps in executing
an interrupt:
•
Finish
current instruction and
saves the PC on stack.
•
Jumps
to a fixed location in memory depend on type of interrupt
•
Starts
to execute the interrupt service routine until RETI (return from interrupt)
•
Upon
executing the RETI the microcontroller returns to the place where it was
interrupted. Get pop PC from stack
Interrupt Sources:
•
Original
8051 has 6 sources of interrupts
1.
Reset
2.
Timer 0 overflow
3.
Timer 1 overflow
4.
External Interrupt 0
5.
External Interrupt 1
6.
Serial Port events buffer full, buffer empty,
etc)
Interrupt Vectors:
Each interrupt
has a specific place in code memory where program execution (interrupt service
routine) begins.
External Interrupt 0: 0003h
Timer 0 overflow: 000Bh
External Interrupt 1: 0013h
Timer 1 overflow: 001Bh
Serial: 0023h
ISRs and Main Program
in 8051:
ORG 00H
SJMP main
ORG 03H
ljmp int0sr
ORG 0BH
ljmp t0sr
ORG 13H
ljmp int1sr
ORG 1BH
ljmp t1sr
ORG 23H
ljmp serialsr
ORG 30H
main:
…
END
Interrupt Enable
(IE) register:
•
All interrupt are disabled after reset
•
We can enable and disable them by IE
Enabling and
disabling an interrupt:
•
by bit operation
•
Recommended in the middle of program
•
SETB EA ;Enable
All
•
SETB ET0 ;Enable Timer0 over flow
•
SETB ET1 ;Enable Timer1 over flow
•
SETB EX0 ;Enable INT0
•
SETB EX1 ;Enable INT1
•
SETB ES ;Enable Serial port
•
•
by mov instruction
•
Recommended in the first of program
•
MOV IE, #10010110B
Interrupt
Priorities:
•
What
if two interrupt sources interrupt at the same time?
•
The
interrupt with the highest PRIORITY gets serviced first.
•
All
interrupts have a power on default priority order.
1.
External
interrupt 0 (INT0)
2.
Timer
interrupt0 (TF0)
3.
External
interrupt 1 (INT1)
4.
Timer
interrupt1 (TF1)
5.
Serial
communication (RI+TI)
•
Priority
can also be set to “high” or “low” by IP reg.
Interrupt
Priorities (IP) Register:
IP.7: reserved
IP.6: reserved
IP.5: timer 2 interrupt priority bit(8052 only)
IP.4: serial port interrupt priority bit
IP.3: timer 1 interrupt priority bit
IP.2: external interrupt 1 priority bit
IP.1: timer 0 interrupt priority bit
IP.0: external interrupt 0 priority bit
Interrupt
Priorities Example:
•
MOV IP , #00000100B
Or
SETB IP.2 gives priority
order
1. Int1
2. Int0
3. Timer0
4. Timer1
5. Serial
•
MOV IP , #00001100B
Gives priority order
1. Int1
2. Timer1
3. Int0
4. Timer0
5. Serial
Interrupt inside an
interrupt:
•
A
high-priority interrupt can interrupt a low-priority interrupt
•
All
interrupt are latched internally
•
Low-priority
interrupt wait until 8051 has finished servicing the high-priority interrupt
Timer interrupt
Example1:
•
A
10khz square wave with 50% duty cycle
XTAL = 12MHz
ORG 0 ; Reset entry point
LJMP MAIN
; Jump above interrupt
ORG 000BH
; Timer 0 interrupt vector
T0ISR: CPL P1.0 ; Toggle port bit
RETI ; Return from ISR to Main program
MAIN: MOV TMOD, #02H; Timer 0, mode 2
MOV TH0, #-50; 50 us delay
SETB TR0 ;
Start timer
MOV IE, #82H ; Enable timer 0 interrupt
SJMP $
; Do nothing just wait
END
Timer0 & Timer1
Interrupt Example:
Write a program using interrupts to simultaneously create
7 kHz and 500 Hz square waves on P1.7 and P1.6. XTAL = 12MHz
Solution:
ORG 0
LJMP MAIN
ORG 000BH
LJMP T0ISR
ORG 001BH
LJMP T1ISR
ORG 0030H
MAIN: MOV TMOD, #12H
MOV IE, #8AH
MOV TH0, #-71
MOV TH1, #0fcH
MOV TL1, #18H
SETB TR1
SETB TR0
SJMP $
T0ISR: CPL P1.7
RETI
T1ISR: CLR TR1
MOV TH1, #0fcH
MOV TL1, #18H
SETB TR1
CPL P1.6
RETI
END
External hardware
interrupts:
•
The
8051 has 2 external interrupts
Ø P3.2 INT0 PIN12
Ø P3.3 INT1 PIN13
Ø The interrupt vector table locations are 0003h and
0013h for
INT0 and INT1
•
There
are two activation levels
1. Negative edge triggered
2.
Low level triggered
Minimum duration
required for external interrupt:
External interrupt
type control:
•
By
low nibble of Timer control register TCON
•
IE0
(IE1): External interrupt 0(1) edge flag.
–
IE
= 1 when –ve edge detected at int input.
–
Does
not affected by -ve edge at the int input.
–
CPU
clears IE when RETI executed.
–
does
not latch low-level triggered interrupt
•
IT0
(IT1): interrupt 0 (1) type control bit.
–
Set/cleared
by software
–
IT=1 -ve edge trigger
External interrupt
Example: (INT0):
#include<reg51.h>
sbit rs=P3^0;
sbit rw=P3^1;
sbit en=P3^3;
void command();
void display();
unsigned int
arr1[5]={0x38,0x06,0x01,0x0e,0x80};
unsigned char
arr2[10]=
{0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x27,0x7f,0x6f};
unsigned char
arr3[14]={"WELCOME TO ALL"};
int a,b,c;
int i,j;
void de(unsigned
int n);
void
ISR()interrupt 0
{
for(a=0;a<=9;a++)
{
P2=arr2[a];
de(100);
}
}
void main()
{
IE=0x81;
while(1)
{
for(b=0;b<=4;b++)
{
P1=arr1[b];
command();
}
for(c=0;c<=13;c++)
{
P1=arr3[c];
display();
}
}
}
void de(unsigned
int n)
{
for(i=0;i<=n;i++)
{
for(j=0;j<=1000;j++);
}
}
void command()
{
rs=0;
rw=0;
en=1;
de(100);
en=0;
}
void display()
{
rs=1;
rw=0;
en=1;
de(100);
en=0;
}
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