8to3 Encoder:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the
following lines to use the declarations that are
-- provided for
instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity 8to3encoder is
Port ( b : in
std_logic_vector(7 downto 0);
y : in
std_logic_vector(2 downto 0));
end 8to3encoder;
architecture Behavioral of 8to3encoder is
begin
end if;
end loop;
end Behavioral;
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